System for multiplex transmission of electrical signals utilizing synchronized ring counters

ABSTRACT

A system and an apparatus for multiplex transmission of electrical signals via a single signal line. In a transmitter and a receiver, &#39;&#39;&#39;&#39;on&#39;&#39;&#39;&#39; positions of ring counters thereof are sequentially shifted in synchronism with each other by a clock pulse generating circuit and a resetting circuit. Means are provided for converting n electrical signals to output voltages of the respective stages of n-stage ring counter in the transmitter and for sequentially applying said output voltages to the corresponding stages of the read counter in the receiver, through said single signal line, upon every shifting of the &#39;&#39;&#39;&#39;on&#39;&#39;&#39;&#39; position of the ring counter of the transmitter.

United States Patent 1191 Hotta SYSTEM FOR MULTIPLEX TRANSMISSION OF ELECTRICAL SIGNALS UTILIZING SYNCHRONIZED RING COUNTERS June 28, 1974 3,566,038 2/1971 Slavin l79/l5A 3,651,454 3/1972 Venema 340/184 OTHER PUBLICATIONS lnvgntor; Yoichi Hofla Nagoya, Japan Electronics, March issue, [73] Assignee: Kabushiki Kaisha TokaiRika Denki I Primary Emmi-n er Kath1een H. claffy Nlshlkdsugal'gun Assistant ExaminerDavid L. Stewart Japan Attorney, Agent, or Firm-Woodhams, Blanchard & [22] Filed: Aug. 7, 1972 Flynn [21] Appl. No.: 278,410 [57] ABSTRACT A system and an apparatus for multiplex transmission [30] Foreign Application Priority Data of electrical signals via a single signal line. In a trans- Aug. 7, 1971 Japan 46-59826 te an a ec er, on positions of ring counters Aug. 7, 1971 Japan 46-59827 hereof are sequentially shifted in synchronism with each other by a clock pulse generating circuit and a [52] US. Cl. 179/15 A, 179/15 BL ing c i Meari re provided for converting it [51] Int. Cl. H04j 3/04 e al signals to utput voltages of the respective [58] Field of Search 179/15 A, l B; 307/223 R, stages of n-stage ring counter in the transmitter and 307/243; 332/9 T, 15 BL for sequentially applying said output voltages to the corresponding stages of the read counter in the re- [56] R f renc s Cit d ceiver, through said single signal line, upon every UNITED STATES PATENTS shifting of the on position of the ring counter of the 2,617,931 11/1952 Trousdale 179/15 A transmtter 2,999,129 9/1961 Lynch 179/15 A 13 Claims, 6 Drawing Figures 1? n a l /R6-- rRBl L IT R R62 l l I 1 R32 D 2:: {qLrzz Rana SYSTEM FOR MULTIPLEX TRANSMISSION OF ELECTRICAL SIGNALS UTILIZING SYNCIIRONIZED RING COUNTERS This invention relates to multiplex transmission system of electrical signals which permits to transmit multiple simple electrical signals such as voltage signals, logical signals or the like via a single signal wire and to discriminate said signals from each other in a receiver.

Conventionally, there have been provided PCM, PAM, time-division multiplex and frequency-division multiplex systems for transmitting a multiplicity of electrical signals via a reduced number of signal wires. In those systems, however, installation cost was extremely expensive in view of their complicated structure in circuit and mechanisms. Thus, such systems are too expensive to be employed for transmitting simpler electrical signals through short distance, though they might be applicable to a large scale communication system, such as a telephone communication system.

The present invention has been made to solve the above problem and it is therefore an object of the present invention to provide a multiplex transmission system of electrical signals which is composed only of simple circuits and can be manufactured easily and at a low cost. I

It is another object of the present invention to provide a multiplex transmission system of electrical signals which permits arbitrary design of circuit depending upon the number of signals to be transmitted and hence permits increase or decrease of circuits, relatively easily according to necessity.

It is a further object of the present invention to provide an apparatus for multiplex transmission of electrical signals which is capable of transmitting voltage corresponding to resistance, voltage corresponding to analog voltage, or the like through simple circuit.

It is a still further object of the present invention to provide an apparatus for multiplex transmission of electrical signals in which n resistance sources whose resistance values are variable selectively by the operation of multipole switches are included in a transmitting station as a signal source, and drive circuit therefor as well as a plurality of loads are connected in a receiving station, whereby connection and disconnection between a set of switches anda set of loads in, for example, automobiles or the like is controlled via a single signal line and a single power supply line.

It is a still further object of the present invention to provide an apparatus for multiplex transmission of electrical signals, which permits arbitrary design of circuit depending upon the number of signals to be transmitted facilitating increase or decrease circuit relatively easily according to necessity.

The present invention will now be described in con-' junction with the accompanying drawings illustrating a perferred embodiment of the present invention, in which;

FIG. 1 shows a basic electric circuit,

FIG. 2 shows voltage waveforms at various points in the above circuit,

FIGS. 3 to 6 show circuit diagrams employable for various purposes in combination with the circuit of switchcircuit to be connected to the transmitter and FIG. 6 shows a driver circuit to be connected to the receiver.

Referring first to FIG. 1 which is a basic circuit diagram of the present invention, there is illustrated a transmitter A connected with a receiver B via a single signal line L. The transmitter A comprises a ring counter having n stages 1,, l 1,, (n is an integer of two or more), a resetting circuit 2 and a clock pulse generating circuit 3. The receiver B comprises a ring counter having the same number of stages 4,, 4 4,, as those of the ring counter in the transmitter A.

A first stage 1, of the ring counter in the transmitter A is composed of capacitors C, and C,,, resistors R,, R,, and R a variable resistor VR,, a diode D,,, a Zener diode ZD, and transistors Tr,, and Tr,,, and a second stage 1 of said ring counter is connected through said capacitor C Said second stage 1 is composed of a capacitor C resistors R R R and R.,,, a variable resistor VR diodes D, and D and transistors Tr,, and Tr Other succeeding stages are similarly constructed but a final stage 1,, is composed of a capacitor C resistors R,,,, R R and R.,,,, a variable resistor VR diodes D, and D and transistors Tr,, and Tr Each stage of the ring counter is coupled with a capacitor of respective preceding stage (for example, a third stage of the ring counter is coupled with the capacitor C in the second stage 1 The capacitor C, is so selected that it has sufficiently larger capacitance than those of capacitors C,,, C and C,,,., in the preceding stages.

A resetting circuit 2 comprising resistors R and R and a transistor Tr,, is coupled with the final stage 1, of

the ring counter through the capacitor C,,,.

Connected to a collector of the transistor Tr, in the resetting circuit 2 is a clock pulse generating circuit 3 comprising transistors TL, and Tr,, a resistor R and a capacitor C E designates a power supply, R R resistors and D, a diode, respectively.

In the receiver B, a first stage 4, of the ring counter is composed of capacitors C and C resistors R R R and R a Zener diode ZD and transistors Tr,,, and Tr,,, and a second stage 4 of said ring counter is coupled therewith via said capacitor C Said second stage 4 of the ring counter is composed of a capacitor C resistors R and R diodes D and D and transistors Tr,,, and Tr,,. The succeeding stages are constructed in similar way but the final stage 4,, whichis composed of resistors R and R diodes D and D and transistors Tr and Tr,,, Each stage of the ring counter is connected to a capacitor of the preceding stage, respectively. E, designates a power supply and C represents a capacitor of a stage immediately preceding the final stage 4,, of the ring counter.

The operation of the circuit assembly thus constructed is now described. Pairs of transistors Tr,, and Tr Tr,, and Tr Tr,,, and Tr,, and Tr,,, and Tr Tr,,, and Tr,,; Tr,,, and Tr,,, constitute conventional ring counters and they are so designed that when either one of the transistors constituting such a pair is turned on, the other is also turned on by virtue of positive feedback and that when either one of the transistors is turned off, the other is also turned off. Each of said pairs of transistors Tr, and Tr Tr, and Tr,,, and Tr and Tr,,; Tr,,, and Tr,,, is adapted to be turned on only when a positive pulse is applied through a capacitor coupled .to the respective preceding stages (for example, a pair of transistors Tr Tr are turned on by a positive pulse applied through the capacitor C The transistors Tr and Tr and Tr and Tr in the first stages 1, and 4, of the ring counters are supplied with base currents and turned on only when all other transistors are in off states.

Assuming that the transistors Tr and Tr and Tr and Tr of the first stages 1 and 4, of the ring counters are now in their on" states, an emitter current of the transistor Tr of the first stage of the receiver B flows through the diode D partially as a collector current of the transistor Tr in the first stage of the transmitter A. An emitter current of the transistor Tr is fed through the resistor R the diode D and the resistor R,,, but a collector voltage of the transistor Tr, in the clock pulse generating circuit 3 is a voltage determined due to resistance division by resistors R and R As the capacitor C of the clock pulse generating circuit 3 is charged gradually through the resistors R5 and R and the charged potential, namely, emitter potential of the transistor Tr becomes higher than collector potential of the transistor Tr the transistor Tr is turned on. This results in feeding of a base current to the transistor Tr causing it to be turned on. By the action of this positive feedback, the charge of the capacitor C is instantaneously discharged through the transistors Tr and Tr.;.

When the transistor Tr; is turned on, the current flowing through the resistor R and the diode D is fully diverted to the transistor Tr so that no current flows through the emitter of the transistor Tr in the first stage 1, of the ring counter, which results in turning-off of the transistor Tr and the transistor Tr Since a positive pulse is applied to the capacitor C simultaneously with turning-off of the transistor Tr a current flows through the resistor R This current flows to the ground through the diode D the resistor R and the transistor Tr when the transistor Tr; is in on condition, but the current flows through the resistor R as a base current of the transistor Tr in the secnd stage 1 of the ring counter when the transistors Tr, and Tr are turned off as a result of discharge of the capacitor C As a result, the transistor Tr is turned on and accordingly, the transistor Tr is also turned on. When the transistors Tr and Tr are turned on, voltage potential of a common line L, is lowered and the base current of the transistor Tr is not supplied because it is blocked by the Zener diode 2D,. This assures that the transistors Tr, and Tr are not turned on again. Even if a positive pulse is produced on the common line L during a transient time when the on position of the ring counter is shifted from the transistors Tr and Tr to the transistors Tr and Tr it will be absorbed by the capacitor C1, preventing erroneous turning-on of the transistors Tr and Tr The discharge of the capacitor C is effected in an instant, so that on time of the transistor Tr is very short.

Since the transistors in all stages 1,, 1 1,, of the transmitter A are in off condition so long as the transistor Tr, has been kept off, the potential of the signal line L is raised. As a result, emitter current of the transistor Tr in the first stage 4, of the ring counter of the receiver B is blocked and the transistors Tr. and Tr therein are turned off. Simultaneously with tuming-off of the transistor Tr6 a positive pulse is applied to the capacitor C and supplied through the diode D as a base current of the transistor Tr in the second stage 4 of the ring counter.

Thus, the transistor Tr in the second stage 1 of the ring counter of the transmitter A is turned on, so that the potential of the signal line L is lowered and, at the same time, the transistor Tr in the second stage 4 of the ring counter is turned on. When the transistor Tr is turned on, the emitter current thereof flows through the diode D partially as a collector current of the transistor Tr It is thus seen that the transistors Tr and Tr and Tr,;;' and Tr in the second stages 1 and 4 of the ring counters are now turned on, instead of the transistors Tr and Tr and Tr and Tr upon instantaneous turning-on of the transistor Tr in the clock pulse generating circuit 3 or upon occurence of a clock pulse. The transistor Tr produces clock pulses by repeatedly turning on and off at a frequency of a time constant determined by the resistor R and the capacitor C Thus, if a further clock pulse is produced while the transistors Tr and Tr and Tr and Tr of the second stages 1 4 of the ring counters are in on condition, a similar operation as mentioned above is effected. Stated illustratively, said transistors Tr and Tr and Tr and Tr are turned off and the transistors in third stages (not shown) of the ring counters are turned on. Upon every occurence of subsequent clock pulses, the on positions of the ring counters of the transmitter A and the receiver B are shifted step by step in synchronism with each other.

When a positive pulse is applied to the capacitor C of the final stage 1,, of the ring counter, a base current is. supplied to the transistor Tr of the reset circuit 2 through the resistor R to turn on said transistor Tr Therefore, all the transistors in the stages 1,, l 1,,, 4,, 4 4,, of the transmitter A and the receiver B are turned off similarly in case the transistor Tr in the clock pulse generating circuit '3 is turned on. After a time period determined by the time constant of the capacitor C and the resistor R the transistor Tr is turned off. The transistor Tr whose base current is supplied through the resistor R the diode D the resistors R and R and the Zener diode 2D,, and the transistor Tr whose base current is supplied through the resistors R andR, and the Zener diode ZD are then turned on simultaneously, whereby the transistors Tr and Tr are also turned on, restoring the apparatus into the original condition. Thus, similar operation is repeatedly performed.

At the starting of the apparatus, if the transistors Tr and Trgz in the second stage 1 of the ring counter of the transmitter A are in on condition and the transistors Tr and Tr-, in the first stage 4 of the ring counter of the receiver B are in on position, in the transmitter A, the transistors in the third stage of the ring counter and in the receiver B, the transistors Tr and Tr in the second stage 4 of the ring counter are turned on upon the occurence of the next clock pulse. Similarly, the on positions of the ring counters are shifted step by step until the transistors Tr and Tr in the final stage 1,, of the transmitter A, and the transistors in the stage immediately preceding the final stage 4,, of the ring counter in the receiver B are turned on. In this condition, if a clock pulse is produced, the transistors Tr and Tr and the transistors in the stage immediately preceding the final stage 4,, of the receiver B are turned off. With these transistors turned off, the transistor Tr in the resetting circuit 2 is turned on. The transistor Tr tends to be turned on by a base current supplied from the capacitor C but it is kept in off condition so long as the transistor Tr is turned on. By selecting the time constant determined by the capacitor C and the resistor R substantially larger than the time constant determined by the capacitor C and the resistor R the charge of the capacitor C.,,,., will complete its discharge through the diode D and the resistor R while the transistor Tr is in on condition, so that the transistor Tr in the final stage 4,, of the ring counter will no longer be turned on.

It is thus seen that it is the transistors Tr Tr and Tr,,,, Tr, in the first stages 1 and 4 of ring counters of both the transmitter A and the receiver B that are to .be turned on when the transistor Tr is deenergized in the receiver B, the transistors Tr and Tr in the first stage 4 of the ring counter are turned on, similar operations can be seen in other cases. Stated illustratively, in case transistors in other stages of the ring counters are randomly in on condition at the starting time of the operation, or in case some transistors are randomly turned on, during the operation, due to some possible noise, the on positions of the ring counters are sequentially shifted until the transistors Tr and Tr in the last stage l, of the transmitter A are turned on and turned off again thereafter to energize the transistor Tr in the resetting circuit 2. All transistors other than the transistors Tr and Tr and Tn; and Tr in the first stages of the ring counters are kept in off condition, whatever the condition of the ring counters may be immediately before such tuming-on of the transistor'Tr if the turning-on period of time of said transistor Tr is sufficiently long. Accordingly, when the transistor Tr is then deenergized, the transistors Tr and Tr and Tr and Tr are necessarily turned on, thereafter permitting sequential shifting of on positions of the ring counters in synchronism with each other.

Signal transmission will now be described. When the transistors Tr and Tr Tr and Tr of the first stages 1, and 4 of the ring counters of the transmitter A and the receiver B are in on condition and fully saturated and if the value of the resistor R ischosen substantially larger than that of the resistor R the collector voltage of the transistor Tr will be determined through voltage division by the resistor R and the variable resistor VR On the other hand, since the transistor Tr is also tumed on, the collector voltage of the transistor Tr is the sum of the collector voltage of the transistor Tr and a threshold voltage of the diode D Therefore, the collector voltage of the transistor Tr will be proportional to the resistance value of the variable resistor VR In other words, the output voltage of the receiver B is proportional to the resistance value of the variable resistor VR of the transmitter A.

A similar effect can be seen in the second stage 4 of the ring counter in the receiver B. Stated illustratively, the collector voltage of the transistor TR is proportional'to the resistance value of the variable resistor W, when the transistor TR of the second stage 1 of the ring counter of the transmitter A are in on condition. Similarly, the output voltage in each stage of the ring counter in the receiver B is proportional to the resistance value of the variable resistor in the same stage of the transmitter A. With the circuit illustrated, transmittable voltage value is in the order of one third of the power supply voltage.

The embodiment described above will now be explained more particularly with reference to FIG. 2 which shows voltage waveforms at various points in the circuits. Assuming that the voltage of the power supply E of the transmitter A is 10V, resistance values of the resistors R R and R are 1K0, resistance value of the variable resistor VR is 2000, resistance value of the VR is 00 and resistance value of the VR,, is 1000, then the voltage waveform as shown in FIG. 2a appears on the signal line L. The pulse P, is a resetting pulse produced when the transistor Tr of the resetting circuit 2 is turned on, V is a voltage appearing on the signal line L when the first stage 1 of the ring counter is turned on. Similarly, V V,, are voltages appearing on the signal line L when the second stage 1 and the final stage 1,, are in on conditions, respectively. P P and P, are clock pulses appearing on the signal line L whenever the transistor Tr of the clock pulse generator B is turned on. FIG. 2b shows a collector voltage waveform of the transistor Tr in the first stage 4 of the ring counter of the receiver B. The low voltage level thereof is at 2.3V which is the sum of 1.7V determined through resistor division by the resistor'R and the variable resistor VR; in the first stage 1 of the transmitter A, and 0.6 V of threshold voltage of the diode D The high voltage level thereof is at 10V of the power supply voltage, which shows the transistor Tr is in off state.

FIG. 2c shows collector voltage waveform of the transistor Vr in the second stage 4 of the ring counter of the receiver B. The low voltage level is at 0.6V which corresponds to threshold voltage of the diode D because the emitter of the transistor Tr in the second stage 1 of the ring counter of the transmitter A is grounded. The high voltage level is at 10V of the power supply voltage as in the previous case.

FIG. 2d shows collector voltage waveform of the transistor Tr in the final stage 4,, of the ring counter of the receiver B. The low voltage level is at 1.5 V which is the sum of 0.9V of resistance division value of the resistor R and the variable resistor VR,, in the final stage 1,, of the transmitter A and 0.6V of the threshold voltage of the diode D The high voltage level is at 10V of the power supply voltage.

As has been describedabove, voltage pulses the magnitudes of which are proportional to the resistance values of the variable resistors VR VR and VR,, connected to the respective stages 1 1 and 1,, of the ring counter of the transmitter A appear at respective outputs of the stages 4 4 4, of the ring counter of the receiver B. Application examples of the present invention will be given in the following.

One application example in which temperature is collectively detected is first explained. A thermistor is connected in place of the variable resistor VR VR VR, in respective stage 1 1 1, of the ring counter of the transmitter A, and a cathode of a diode D in the circuit shown in FIG. 3 is connected to each of the collectors of the transistors Tr Tr Tr of the stages 4 4 4,, of the receiver B. An output circuit including the diode D is composed ofa transistor Tr resistors R and R and a capacitor C If the time constant determined by the resistor R and the capacitor C is chosen sufficiently longer than the period of the ring counter, the base voltage of the transistor Tr depends upon a low level of cathode potential of the diode D or the signal voltage. Accordingly, by installing thermistors at positions where detection of temperature'is desired, the temperature at those positions may be detected as output voltage of the output transistor Tr of each stage in the receiver B.

With the above-mentioned circuit arrangement, heat generation of a number of motors or the like in a factory or the like may be collectively monitored and accident due to possible overheat of the motor can be well prevented.

Another application example in which analogue volt ages are transmitted will be described hereunder. An emitter of a transistor Tr of a circuit shown in FIG. 4 is connected in place of variable resistors VR VR VR in the stages 1 1 1, of the ring counter of the transmitter A. A resistor R is connected between the emitter of the transistor Tr and the ground. By making the emitter currents of the transistors Tr Tr Tr and the resistance of the resistor R sufficiently small, the emitter voltage of the transistor Tr is a difference between a signal voltage applied to the base of the transistor Tr and the voltage across the base and emitter of the transistor Tr irrespective of a current from the ring counter. This voltage is transmitted through the signal line L to collectors of the transistors Tr Tr Tr of the ring counter stages 4 4 4, of the receiver B. Thus, by connecting the cathode of the diode D of the circuit shown in FIG. 3 to respective collector of the transistors Tr Tr Tr the voltage proportional to the respective signal voltage applied to the base of the transistor Tr connected to the respective stage of the ring counter of the transmitter A appears at the output of the transistor.

With the circuit arrangement described above, it is possible to collectively monitor pulsations per unit time period of a number of patients with advanced diseases in a hospital by converting the pulsations to voltages, whereby early detection of an abnormal patient is assured.

Other application example in which a number of loads (such as relays) are remotely controlled is explained hereinbelow. A movable contact of threecontact switch S in the circuit shown in FIG. 5 is connected in place of each of the variable resistors VR VR VR in the stages 1 1 1,, of the ring counter of the transmitter A. Between fixed contacts of the switch'S and the ground, a first fixed contact S is directed grounded, a second fixed contact S is grounded via a resistor Rm, and a third fixed contact S is grounded via a resistor R To a cathode of a diode D of the circuit shown in FIG. 6 is connected each of the collectors Tr Tr Tr of the stages 4,, 4 4 of the ring counter of the receiver B. A drive circuit including the diode D is composed of transistors Tr, 141 to Tr resistors R to R capacitors C to C diodes D to D and relays Y and Y For the purpose of clarification of the description, explanation is directed to the first stages of the transmitter A and the receiver B, and it is assumed that the resistor R is of 2000,11 is of 1000, R is of 1m, R is of IOKQI and the power supply voltage is 10V.

scription of the circuit of FIG. 1. Thus when the cathv ode voltage of the diode D of the driver circuit is 0.6V of the low level, the charge in the capacitor C m is almost fully discharged through the diode D and the transistor Tr is deenergized. If the time constant of the resistor R and the capacitor C is sufficiently large, the current flowing through the resistor R charges the capacitor C even if the cathode potential of the diode D increases to the high level corresponding to the power supply voltage. Thus, the transistor Tr remains in its off state without turning on. When the cathode potential of the diode D becomes the low level, the charge in the capacitor C is discharged through the diode D so that no base current flows into the transistor Tr keeping it in its off" state. With the transistor Tr being always in its off state, the base current of the transistor Tr is supplied via the diode D so that the transistor Tr is turned on. Thus, the relay Y, is actuated and the load connected to the contacts of the relay Y, may be controlled. On the other hand, since the base current of the transistor Tr 143 is blocked by the capacitor C said transistor Tr is not turned on and the relay Y is not actuated.

When the movable contact of the switch S is connected to the second fixed contact S the emitter of the transistor Tr is connected to the ground through 2000 of emitter resistor R so that the collector voltage of the transistor Tr, is at 2.3V of the low level as shown in FIG. 2b, which is seen from the description of the circuit of FIG. 1. In order to turn off the transistor Tr the base potential thereof must be below 2.4V which is the sum of the threshold voltages (3 X 0.6V) of the diodes D D and D and 0.6V of threshold voltage of the transistor Tr Therefore, unless the cathode potential of the diode D is below 1.8V, which is a difference between 2.4V and 0.6V of threshold voltage of the diode D the transistor Tr will' not be turned off. Therefore, under the conditions, the current supplied through the resistor R flows into the base of the transistor Tr keeping said transistor Tr in on condition. Accordingly, no current is supplied to the bases of the transistors Tr and Tr and they remains in their off states. The relays Y Y are, therefore, not actuated.

When the movable contact of the switch S is connected to the third fixed contact S the emitter of the transistor Tr is grounded via 1000 of the resistor R so that the collector voltage of the transistor Tr, is at 1.5V of the low level as shown in FIG. 2d. When the cathode potential of the diode D is at 1.5V of the low level, the charge in the capacitor C is discharged until the voltage at anode side reaches about 2.1V, when the transistor Tr is turned off. Since the voltage at anode side of the capacitor C is sufficiently high as compared with the case where the movable contact is connected to the first fixed contact 8,, the capacitor C is charged through the resistor R when the cathode potential of the diode D1. becomes high level corresponding to the power supply voltage. The time period required to reach the voltage enough to turn on the transistor Tr is sufficiently shorter as compared with thecase where the movable contact is connected to the first fixed contact S Therefore, before the cathode potential of the diode D has been reduced to'the low level again, the transistor Tr is turned on. Thereafter, when the cathode potential of the diode D is lowered to the low level, the transistor Tr is turned off. Thus, the transistor Tr repeats its on and off states, whereby the base current is supplied to the transistor Tr through the action of the capacitors C and C and the diodes D and D which constitute a DC. restoration and an integration circuit, keeping said transistor Tr in its on state. The relay Y is accordingly driven and the load connected to the contact thereof may be controlled.

With the transistor Tr kept in its on state, the current supplied through the resistors R and R when the transistor Tr is in its off state, flows mostly through the diode D -and the transistor Tr so that the transistor Tr is kept in its off state. Th relay Y is, therefore, not actuated.

The circuit arrangement described above can be employed in an automobile with great advantages, where wiring is extremely complicated for connecting various kinds of switches to various loads. Stated illustratively, with such a circuit arrangement, the switches can be coupled with the loads through a single signal line and a single power line. Accordingly, wiring work in manufacturing process is much simplified, possible miswiring is well avoided and risk of wire breakage or shortcircuit is by far reduced.

In the embodiments of FIGS. 5 and 6 as mentioned above, the first stages 1 and 4 of the ring counters were explained particularly. However, it should be understood that by connecting the switch of FIG. 5 and the driver circuit of FIG. 6 to each of the second to n-th stages, 2n relays can be controlled by n stages.

It should also be understood that ring counters using flip-flop, SCR or the like may be employed in placeof the ring counters used in the embodiment of FIG. 1, for the same purpose.

As has been fully described hereinabove, the present invention is characterized by the transmitter comprising the n-stage ring counter, the clock pulse generating circuit and the resetting circuit, and the receiver comprising the ring counter, the transmitter and the receiver being coupled through a single signal line, on positions of the ring counters in the transmitter and the receiver being sequentially shifted with the clock pulses supplied by the clock pulse generating circuit and both ring counters being synchronized with respect to their on positions by reset pulse from the resetting circuit. In this way, an output of each stage of the transmitter is transmitted to a corresponding stage of the receiver, permitting multiplex transmission of a multiple of signals through a single signal line. Since the present system can transmit voltage signals corresponding to resis tance values or voltage signals corresponding to analogue voltage values, it may be employable for various purposes, such as central monitoring of temperature, detection of analogue values in which a number of parameters change continuously, and separate control for a number of loads. The number of stages of the ring counter may be selected arbitrarily depending upon the number of signals to be transmitted. Furthermore,

I 10 since only simple circuits are used in the present apparatus, manufacturing cost is by far reduced as compared with a convertional apparatus for multiplex transmission of electrical signals.

What is claimed is:

I, l. A multiplex transmission system for electrical signals, comprising in combination:

a transmitter comprising a ring counter having n stages;

a receiver comprising a further ring counter having n stages;

said n transmitter ring counter stages each having electronic switch means for converting a corresponding one of n input electrical signals to an output voltageof the respective stage;

periodic pulse generating means connected to the stages of one said ring counter for sequentially shifting stage activation therein;

a single signal line and means collectively connecting said ntransmitter stages to said n receiver stages through said single signal line for shifting stage activation of said other ring counter in synchronism with said shifting in said one. ring counter, each of said receiver ring counter stages having electronic switch means connected to said single signal line and responsive to said output voltage of thecorresponding transmitter stage for providing an output corresponding to the respective input electrical signal;

to thereby sequentially transmit through a single line the signal inputs to sequentially activated transmitter stages to outputs ofcorrespondingly sequentially actuated receiver stages.

2. The system of claim 1 in which said electronic switch means of each said stage comprises first and second opposite polarity electronic devices coupled in a feedback loop, and including capacitive coupling means between the first electronic devices of adjacent stages for activating one stage in response to deactivation of the preceeding stage, said first electronic devicesof said receiver stages being connected to said single signal line, said transmitter stages each including unidirectional conducting means for connecting the respective first electronic device thereof to said single signal line.

3. The system of claim 2 in which said periodic pulse generating means include further electronic switch means coupled to said electronic devices of said transmitter stages for deactivating activated ones thereof so asto produce a corresponding pulse on said single signal line.

4. The apparatus of claim 3 in which said electronic switch means of each stage of said transmitter includes means connecting the corresponding input electrical signal in series with said first electronic device and said unidirectional conducting means of said transmitter stage for correspondingly varying the voltage on said single signal line in response to activation of said stage, the corresponding receiver stage having an output terminal associated with the side of the first electronic device thereof opposite that side connected to said single signal line.

5. An apparatus for multiplex transmission of electrical signals, comprising .in combination:

a transmitter having an n-stage ring counter, each stage including a source for providing a signal am plitude to be transmitted, a decoupling element and a first electronic switching means actuable for serially connecting said source to said decoupling element, each said stage further including a second electronic switching means connected to said first electronic switching means for terminating conduction therethrough;'

a single signal line connected to the decoupling element of each of said stages;

a receiver having a further n-stage ring counter, each stage including a third electronic switching means and further including a fourth electronic switching means connected to said third electronic switching means for terminating conduction therethrough, each of said third electronic switching means being connected to said signal line for producing an output corresponding to the source signal amplitude of the corresponding transmitter stage and for synchronizing advancement of said receiver and transmitter stages;

pulse generator means connected commonly to the stages of one of said ring counters for sequentially advancing stage actuation in said one ring counter;

whereby a signal from said source applied to one said first electronic switching means of said transmitter results in a corresponding output signal on the corresponding'third electronic switching means of said receiver. 6. An apparatus as claimed in claim 5 in which said first and second electronic switching means are respectively NPN and PNP transistors, said source being contive therewith, said signal from said source in a given transmitter stage being coupled to the'emitter of the NPN transistor of said given transmitter stage and appearing as a corresponding collector voltage of the NPN transistor of the corresponding receiver ring counter stage.

7. An apparatus as claimed in claim 6 including variable resistor means in series with respective ones of said NPN transistors of said transmitter and coupled to the emitters thereof, said resistor means being variable in resistance as a measure of a parameter to be transmitted, an output transistor for each receiver stage and unidirectional conducting means coupling an input electrode of said output transistor to the collector of the NPN transistor of the corresponding receiver stage, a time constant circuit connected to said output transistor and having a time constant longer than the period of the receiver ring counter for causing the output voltage of said output transistor to represent the resistance of the variable resistor means of the corresponding transmitter stage.

8. An apparatus as claimed in claim 6 including a signal voltage input transistor for at least one stage of said transmitter ring counter and means coupling the emitter potential of said signal voltage transistor to the first electronic switching means of said stage, the corresponding stage of said receiver ring counter including means for providing as an output a voltage proportional to the signal voltage applied to said signal voltage input transistor.

9. An apparatus as claimed in claim 6 in which said transmitter ring counter includes, in at least one stage thereof, a multicontact switch having a movable contact coupled to the other side of the corresponding one of said first electronic switching means, said switch having fixed contacts and selected resistances connected thereto for alternative selection by said movable contact, the corresponding stage of said receiver ring counter including first and second relays and respective first and second relay drive transistors in series therewith, an input transistor, unidirectional voltage dropping means coupling the base of said input transistor to the other side of the first electronic switching means of the corresponding receiver ring counter stage, an RC time base network for said input transistor, a voltage divider paralleling said RC network, said input transistor being connected at one side to a point intermediate the ends of said voltage divider and being coupled at the other side thereof to further voltage dropping means, means coupling spaced points on said voltage divider to the bases of said first and second drive transistors for energizing said relays in differing combinations dependent upon the position selected for the movable contact of said switch in said transmitter stage.

10. An apparatus as claimed in claim 5, wherein said pulse generating means includes reset circuit means responsive to completion of operation of the n" transmitter ring counter stage for applying a reset-pulse to said signal line and deenergizing all stages of said transmitter and receiver ring counters except the first stages of each, said pulse generating means further including resetting periodically actuated clock-pulse generating means for sequentially shifting the on position of the transmitter ring counter by one stage while applying a clock-pulse to said signal line for synchronously shifting the on'position of said receiver ring counter by one stage.

11. An apparatus as claimed in claim 5, wherein said sources comprise n electrical resistors coupled in circuit with respective first electronic switching means for causing said respective first electronic switching means to convert it electrical signals appearingacross said n electrical resistors to output voltages of respective stages of said transmitter, for sequential application to said signal line.

12. An apparatus as claimed in claim 5, wherein said sources comprise n analogue voltage sources coupled to respective first electronic switching means for causing it electrical signals supplied thereby to be converted by said first electronic switching means to output voltages sequentially appearing on said signal line.

13. An apparatus as claimed in claim 5, in which said sources comprise at least n resistors and multipole switch means associated with said n resistors and switchable for selectively varying the resistance values of said resistors, said receiver including a plurality of relays and driver circuits for said relays connected to outputs of the respective stages of said receiver ring counter, resistance values corresponding to the positions of said switch means being converted to output voltages of the transmitter ring counter, and means connecting said driver circuits for respective stages of said receiver ring counter for driving loads in correspondence to the positions of said switch means. 

1. A multiplex transmission system for electrical signals, comprising in combination: a transmitter comprising a ring counter having n stages; a receiver comprising a further ring counter having n stages; said n transmitter ring counter stages each having electronic switch means for converting a corresponding one of n input electrical signals to an output voltage of the respective stage; periodic pulse generating means connected to the stages of one said ring counter for sequentially shifting stage activation therein; a single signal line and means collectively connecting said n transmitter stages to said n receiver stages through said single signal line for shifting stage activation of said other ring counter in synchronism with said shifting in said one ring counter, each of said receiver ring counter stages having electronic switch means connected to said single signal line and responsive to said output voltage of the corresponding transmitter stage for providing an output corresponding to the respective input electrical signal; to thereby sequentially transmit thRough a single line the signal inputs to sequentially activated transmitter stages to outputs of correspondingly sequentially actuated receiver stages.
 2. The system of claim 1 in which said electronic switch means of each said stage comprises first and second opposite polarity electronic devices coupled in a feedback loop, and including capacitive coupling means between the first electronic devices of adjacent stages for activating one stage in response to deactivation of the preceeding stage, said first electronic devices of said receiver stages being connected to said single signal line, said transmitter stages each including unidirectional conducting means for connecting the respective first electronic device thereof to said single signal line.
 3. The system of claim 2 in which said periodic pulse generating means include further electronic switch means coupled to said electronic devices of said transmitter stages for deactivating activated ones thereof so as to produce a corresponding pulse on said single signal line.
 4. The apparatus of claim 3 in which said electronic switch means of each stage of said transmitter includes means connecting the corresponding input electrical signal in series with said first electronic device and said unidirectional conducting means of said transmitter stage for correspondingly varying the voltage on said single signal line in response to activation of said stage, the corresponding receiver stage having an output terminal associated with the side of the first electronic device thereof opposite that side connected to said single signal line.
 5. An apparatus for multiplex transmission of electrical signals, comprising in combination: a transmitter having an n-stage ring counter, each stage including a source for providing a signal amplitude to be transmitted, a decoupling element and a first electronic switching means actuable for serially connecting said source to said decoupling element, each said stage further including a second electronic switching means connected to said first electronic switching means for terminating conduction therethrough; a single signal line connected to the decoupling element of each of said stages; a receiver having a further n-stage ring counter, each stage including a third electronic switching means and further including a fourth electronic switching means connected to said third electronic switching means for terminating conduction therethrough, each of said third electronic switching means being connected to said signal line for producing an output corresponding to the source signal amplitude of the corresponding transmitter stage and for synchronizing advancement of said receiver and transmitter stages; pulse generator means connected commonly to the stages of one of said ring counters for sequentially advancing stage actuation in said one ring counter; whereby a signal from said source applied to one said first electronic switching means of said transmitter results in a corresponding output signal on the corresponding third electronic switching means of said receiver.
 6. An apparatus as claimed in claim 5 in which said first and second electronic switching means are respectively NPN and PNP transistors, said source being connected to the emitter of said NPN transistor, said decoupling elements being respectively connected to the collectors of said NPN transistors of each stage of said transmitter ring counter, said third and fourth electronic switching means being respectively NPN and PNP transistors, the emitters of said NPN transistors of said receiver being each connected to said single signal line, said pulse generating means including a clock-pulse generator and a reset-pulse generator cooperative therewith, said signal from said source in a given transmitter stage being coupled to the emitter of the NPN transistor of said given transmitter stage and appearing as a corresponding collector voltage of the NPN transistor of the correspondIng receiver ring counter stage.
 7. An apparatus as claimed in claim 6 including variable resistor means in series with respective ones of said NPN transistors of said transmitter and coupled to the emitters thereof, said resistor means being variable in resistance as a measure of a parameter to be transmitted, an output transistor for each receiver stage and unidirectional conducting means coupling an input electrode of said output transistor to the collector of the NPN transistor of the corresponding receiver stage, a time constant circuit connected to said output transistor and having a time constant longer than the period of the receiver ring counter for causing the output voltage of said output transistor to represent the resistance of the variable resistor means of the corresponding transmitter stage.
 8. An apparatus as claimed in claim 6 including a signal voltage input transistor for at least one stage of said transmitter ring counter and means coupling the emitter potential of said signal voltage transistor to the first electronic switching means of said stage, the corresponding stage of said receiver ring counter including means for providing as an output a voltage proportional to the signal voltage applied to said signal voltage input transistor.
 9. An apparatus as claimed in claim 6 in which said transmitter ring counter includes, in at least one stage thereof, a multicontact switch having a movable contact coupled to the other side of the corresponding one of said first electronic switching means, said switch having fixed contacts and selected resistances connected thereto for alternative selection by said movable contact, the corresponding stage of said receiver ring counter including first and second relays and respective first and second relay drive transistors in series therewith, an input transistor, unidirectional voltage dropping means coupling the base of said input transistor to the other side of the first electronic switching means of the corresponding receiver ring counter stage, an RC time base network for said input transistor, a voltage divider paralleling said RC network, said input transistor being connected at one side to a point intermediate the ends of said voltage divider and being coupled at the other side thereof to further voltage dropping means, means coupling spaced points on said voltage divider to the bases of said first and second drive transistors for energizing said relays in differing combinations dependent upon the position selected for the movable contact of said switch in said transmitter stage.
 10. An apparatus as claimed in claim 5, wherein said pulse generating means includes reset circuit means responsive to completion of operation of the nth transmitter ring counter stage for applying a reset-pulse to said signal line and deenergizing all stages of said transmitter and receiver ring counters except the first stages of each, said pulse generating means further including resetting periodically actuated clock-pulse generating means for sequentially shifting the ''''on'''' position of the transmitter ring counter by one stage while applying a clock-pulse to said signal line for synchronously shifting the ''''on'''' position of said receiver ring counter by one stage.
 11. An apparatus as claimed in claim 5, wherein said sources comprise n electrical resistors coupled in circuit with respective first electronic switching means for causing said respective first electronic switching means to convert n electrical signals appearing across said n electrical resistors to output voltages of respective stages of said transmitter, for sequential application to said signal line.
 12. An apparatus as claimed in claim 5, wherein said sources comprise n analogue voltage sources coupled to respective first electronic switching means for causing n electrical signals supplied thereby to be converted by said first electronic switching means to output voltages sequentially appearing on said signal line.
 13. An apparatus as claimed in claim 5, in which said sources comprise at least n resistors and multipole switch means associated with said n resistors and switchable for selectively varying the resistance values of said resistors, said receiver including a plurality of relays and driver circuits for said relays connected to outputs of the respective stages of said receiver ring counter, resistance values corresponding to the positions of said switch means being converted to output voltages of the transmitter ring counter, and means connecting said driver circuits for respective stages of said receiver ring counter for driving loads in correspondence to the positions of said switch means. 